Department of Electrical and Electronic Engineering
Ms. Sutapa Debnath  Lecturer (Senior Scale)
Name :
Ms. Sutapa Debnath
Employee ID
710001899
Designation
Lecturer (Senior Scale)  
Department
Department of Electrical and Electronic Engineering
Faculty
Faculty of Engineering
Personal Webpage
https://faculty.daffodilvarsity.edu.bd/profile/eee/sutapa.html
E-mail
sutapa.eee@diu.edu.bd
Phone
Cell-Phone
+8801940838672
University Degree Year Field of Specialization
Bangladesh University of Engineering and Technology (BUET) M.Sc. Ongoing Electrical and Electronic Engineering (EEE)
Bangladesh University of Engineering and Technology (BUET) B.Sc. 2016 Electrical and Electronic Engineering (EEE)
  • Workshop/Training Experience: 
  • Attended “On-site Training Programme on Outcome-Based Education for Accreditation”, organized by IQAC, Daffodil International University on May 10, 2018.
  • Attended workshop on “Research Methodology and Publications” on April 12, 2018, main building, DIU; conducted by Dr. Shaikh Anowarul Fattah, Professor, EEE, BUET.
  • Attended workshop on "IQAC session on SMART Learning Outcomes and Lesson Planning for EEE" on 4th January, 2018, main building, DIU; conducted by Mark James Bartholomew, quality assurance advisor, DIU. 
  • Completed 22 hours course on “Microcontroller” at Planeter Bangladesh, 2014.

Publications:

 

  • Fatima Tuz Zohora, Sutapa Debnath, Dr. A.B.M. Harun-ur Rashid, “Memristor-CMOS Hybrid Implementation of Leaky Integrate and Fire Neuron Model”, 2019 IEEE  International Conference on Electrical, Computer and Communication Engineering (ECCE), 2019, pp. 1-5. IEEE, 2019.
  • Md. Mohsinur Rahman Adnan, Fatima Tuz Zohora, Maliha Tasnim, Sutapa Debnath, and Sadia Anjum Tumpa, "Portable implementation of profuse perspiration indicator for use in disease symptom detection.", 2017 IEEE International Conference on Imaging, Vision & Pattern Recognition (icIVPR), pp. 1-5. IEEE, 2017.

 

Research: Interested Area:

  • Memristor – CMOS Hybrid Circuit
  • Neuromorphic Computing

 

Undergraduate Thesis:

  • Implementation of Leaky Integrate and Fire Neuron Model with a Memristor - CMOS Hybrid Circuit.

Google Scholar Profile:

https://scholar.google.com/citations?user=Sn-_AxgAAAAJ&hl=en